| View Larger Image | System-on-Chip Test Architectures (Systems on Silicon)
by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba
| | List Price: | $69.95 | | Price: | $55.96 | | You Save: | $13.99 (20%) |  | | Available: | Usually ships in 24 hours | | | | | Sales Rank: | 491021 | | Studio: | Morgan Kaufmann | | | Binding: | Hardcover | | Number Of Pages: | 896 | | Publication Date: | November 16, 2007 | | Publisher: | Morgan Kaufmann |
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EDITORIAL REVIEWS |
Product Description
Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today?s overall product cost.
This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs.
KEY FEATURES
* Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples.
* Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book.
* Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits.
* Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing.
* Practical problems at the end of each chapter for students. |
SIMILAR PRODUCTS |
| | VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
| | On-Chip Communication Architectures: System on Chip Interconnect (Systems on Silicon) (Systems on Silicon)
by Sudeep Pasricha, Nikil Dutt
| | Verification Techniques for System-Level Design (Systems on Silicon) (Systems on Silicon)
by Masahiro Fujita, Indradeep Ghosh, Mukul Prasad
| | Memory Systems: Cache, DRAM, Disk
by Bruce Jacob, Spencer Ng, David Wang
| | Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits (Frontiers in Electronic Testing Volume 17) (Frontiers in Electronic Testing)
by M. Bushnell, Vishwani Agrawal
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