| View Larger Image | Ultra-Low Voltage Nano-Scale Memories (Integrated Circuits and Systems) | Hardcoverby Kiyoo Itoh (Editor), Masashi Horiguchi (Editor), Hitoshi Tanaka (Editor)
| List Price: | $139.00 | | Price: | $105.70 | | You Save: | $33.30 (24%) | | | Available: | Usually ships in 24 hours |
| | Binding: | Hardcover | | Publisher: | Springer | | Edition: | 1st Edition | | Page Count: | 346 Pages | | Publication Date: | August 22, 2007 | | Sales Rank: | 1,760,765st |
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SystemVerilog for Verification teaches the reader how to use the power of the new SystemVerilog testbench constructs plus methodology without requiring in-depth knowledge of Object Oriented Programming or Constrained Random Testing. The book covers the SystemVerilog verification constructs such as classes, program blocks, C interface, randomization, and functional coverage. SystemVerilog for Verification also reviews some design topics such as interfaces and array types. There are extensive...
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EDITORIAL REVIEWS |
Product Description
Ultra-low voltage large-scale integrated circuits (LSIs) in nano-scale technologies are needed to: meet the needs of a rapidly growing mobile cell phone market; and offset a significant increase in the power dissipation of high-end microprocessor units. Low power large capacity memories are a necessary component of low voltage LSIs. Many challenges arise in the process of achieving such memories as their devices and voltages are scaled down below 100nm and sub-1-V. A high signal-to-noise (S/N) ratio design is necessary to deal with small signal voltages from low-voltage memory cells in the presence of large noise sources in a high-density memory-cell array. Moreover, innovative circuits and devices are needed to resolve the increasing problems of leakage currents and variability in both speed and leakage. Since the solutions to these problems lie between different fields, (e.g., digital and analog, SRAM and DRAM) a multidisciplinary approach is needed. "Ultra-Low Voltage Nano-Scale Memories" is an authoritative monograph that addresses these challenges. This book is written for memory and circuit designers as well as for researchers and students who are interested in ultra-low voltage nano-scale memory LSIs. |
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