Researchers at Lanzhou University have published a comprehensive review on high-performance optoelectronic computing chips in the journal PhotoniX Synergy . The work organizes recent advances across six core performance dimensions and builds a full analytical framework covering device performance, computing architectures, system integration and emerging paradigms. It offers an overall reference for research and industrial development of next-generation optoelectronic computing chips in the post-Moore era.
As artificial intelligence and high-performance computing advance rapidly, traditional electronic computing systems face growing performance limits. Computing density keeps rising, but on-chip data bandwidth, memory access efficiency and energy efficiency fail to keep pace. The imbalance between computation, communication and energy use has become a key bottleneck for next-generation computing systems.
Photons carry inherent strengths such as high bandwidth, low latency and natural support for multidimensional multiplexing. These features open a new path to break the speed and efficiency limits of traditional electronic computing. Optoelectronic computing combines the high-speed parallel operation of photonic devices with the strengths of electronic systems in storage, control and programmability. It has become one of the most notable research directions in the post-Moore era. Current research is shifting from single device demonstration to system-level development with coordinated performance metrics. But different metrics often restrict each other and cannot all reach optimal levels at the same time. A complete system-level evaluation framework is urgently needed to clarify technical paths and key breakthrough directions.
To address this need, the review covers six core dimensions, which are computing power, computing accuracy, power consumption, functional integration, reconfigurability and emerging photonic computing paradigms, respectively.
For computing power, the paper presents three main development paths, which are high modulation bandwidth, large-scale integration arrays and multidimensional multiplexing parallelism. It reviews progress in high-speed modulators and matrix scaling architectures, and analyzes trade-offs between performance gains and insertion loss, channel crosstalk and control complexity.
For computing accuracy, the paper identifies common error sources and summarizes four improvement routes. They are digital-analog hybrid design, low optical depth structure, self-calibration control and in-situ training. The paper notes that accuracy improvement requires coordination across coding, hardware, calibration and training layers.
For power consumption, the paper breaks total system energy use into four core parts. It reviews optimization solutions including low-photon computing, high-efficiency devices, non-volatile control and low-bit conversion. It also discusses trade-offs of extreme low-power designs in accuracy, robustness and functional flexibility.
For functional integration, the paper describes the evolution from discrete devices to complete end-to-end chip systems across three integration levels. It points out that higher integration shortens signal paths, reduces interface loss and enhances parallel processing capability.
For reconfigurability, the paper compares four mainstream control technologies and reviews three typical reconfigurable architectures. It notes that future large-scale reconfigurable systems need combined control mechanisms and intelligent configuration algorithms.
For emerging paradigms, the paper introduces four non-classical photonic computing models beyond the traditional von Neumann architecture. These models map computing logic directly through light’s physical dynamics to enable low latency and low power operation.
“Optoelectronic computing is not a simple replacement for traditional electronic computing,” said Professor Yonghui Tian, corresponding author of the paper. “It builds a new fusion architecture for next-generation high-performance computing by making full use of the inherent advantages of both photons and electrons. We hope this review can help peers around the world promote the field from device demonstration to system-level design and practical application.”
“The field has entered a key stage of system integration,” said Researcher Huifu Xiao, corresponding author of the paper. “A single performance breakthrough can no longer support practical systems. Future progress needs cross-layer collaborative design of devices, architectures, algorithms and heterogeneous integration.”
See the article:
High-performance optoelectronic computing chips: research progress, key challenges, and future trends
https://doi.org/10.1007/s44519-026-00008-4
PhotoniX Synergy
Literature review
Not applicable
14-Sep-2026
The author(s) declare that they have no conflict of interest.