Researchers have proposed a multi-channel TDC with Physically Unclonable Function (PUF) that is a generator of fingerprint of IC. Published in Electron. Signal Process, this brand-new TDC architecture with PUF function has the potential to create new direction in research of TDC and hardware security.
Modern Field Programmable Gate Array (FPGA) is quite useful to implement high performance Time-to-Digital Converter (TDC). However, FPGA and the implemented TDC are more vulnerable to malicious attacks for its programmability than unprogrammable devices. Addressing the threads, Assistant Professor Kentaroh Katoh and Professor Toru Nakura from Fukuoka University, in collaboration with Professor Emeritus Haruo Kobayashi from Gunma University have proposed a multi-channel TDC with Physically Unclonable Function that is a generator of fingerprint of IC.
TDCs play a crucial role in broad applications requiring precise time measurements by converting pulse time duration into numeric values and time stamping the arrival time of the pulse. These applications span a wide range, encompassing fields such as time-based signal processing, application-specific integrated circuit (ASIC) testing, Trojan infection detection in ASIC, nuclear medicine imaging with positron emission tomography, 3-D imaging for quality inspection and volumetric detection, laser flight time measurement in laser ranging, fluorescence spectroscopy, fluorescence life-time imaging, light detection and ranging (LiDAR), ultrawideband radio frequency localization, and experiments in high-energy physics including those involving neutrino telescopes, which require low resources and low power consumption due to the operation conditions. These days, TDCs are often implemented with modern FPGA for its programmability and performance.
“Modern FPGAs are quite convenient to implement a picosecond-resolution TDC since it is user customable for its programmability and includes high performance ASIC circuits and macros,” says Assistant Professor Katoh. “However, security threads to the devices are more serious than unprogrammable devices for their programmability and oligopolistic nature of the industry.”
Assistant Professor Katoh et al. added the function to a picosecond multi-channel TDC to generate a bitstring unique in each device utilizing non-linearity of each TDC derived from the manufacturing variation of FPGA (The bitstring unique in each device is called fingerprint of device). Multi-channel TDC uses multiple identical TDCs to measure a time interval. It realizes finer resolution than single TDC. It is one of the most popular TDCs for FPGA. FPGA is suitable for implementing a multi-channel TDC since it has a huge array of identical reconfigurable fabrics. The proposed TDC uses linearity self-calibration with histogram method. With the buffer delay estimated with the calibration, a bitstring is generated. The research of TDCs with PUF is unique in the world.
“PUF is, so to speak, a generator of fingerprint of a device. We challenged to propose a picosecond multi-channel TDC for FPGA with PUF function. By implementing the TDC with PUF function, we can secure the TDC and FPGA with lower cost than using usual PUF circuits,” explained Assistant Professor Katoh. “As far as we know, we are the pioneers in this research topic.”
In their experiment, they implemented the proposed 16-channel TDC with PUF function in AMD Artix-7 FPGA and evaluated the performance. Experimental results show that the performance is comparable with the conventional PUFs.
While they acknowledge the need for further refinement, this research represents a critical step toward a new direction of research of PUF.
This paper ” A weak FPGA physically unclonable function using multiple-parallel single delay-line based time-to-digital converters with linearity self-calibration” was published in Electron. Signal Process .
Katoh K, Nakura T, Kobayashi H. A weak FPGA physically unclonable function using multiple-parallel single delay-line based time-to-digital converters with linearity self-calibration. Electron. Signal Process. 2026(1):0001, https://doi.org/10.55092/esp20260001.
Electronics and Signal Processing
Experimental study
Not applicable
A weak FPGA physically unclonable function using multiple-parallel single delay-line based time-to-digital converters with linearity self-calibration
22-Jan-2026