HSINCHU, Taiwan - For over ten years, atomically thin semiconductors have been considered among the most promising alternatives to silicon. Being only a single atom thick, these materials possess outstanding electrical characteristics and could facilitate the development of faster, smaller, and more energy-efficient transistors that surpass current chip technology limits. However, despite significant advances in discovering new two-dimensional semiconductors, one persistent engineering obstacle continues to hinder progress.
To create a functional transistor, engineers need to add an ultrathin insulating layer, called the gate dielectric, over the semiconductor to manage electron flow. Thinner layers enhance electrical control, which becomes crucial as transistors become smaller. However, using atomically thin materials can harm the sensitive electronic interface, causing electron scattering and impairing the performance improvements engineers aim for. For years, the semiconductor community has faced an uncomfortable compromise: improve gate control or preserve carrier mobility, but rarely both.
Researchers from National Yang Ming Chiao Tung University (NYCU), working with TSMC Corporate Research, now report a new interface-engineering strategy that helps overcome this long-standing bottleneck. Published in Nature Electronics , the study demonstrates that carefully redesigning the atomic boundary between a semiconductor and its insulating layer can simultaneously enable aggressive dielectric scaling and preserve high electrical performance in atomically thin transistors. Instead of seeking an entirely new semiconductor material, the team concentrated on the interface between two materials, which is only a few atoms thick.
"For many years, efforts to improve atomically thin transistors have largely focused on discovering better semiconductor materials," said Professor Wen-Hao Chang, the study's corresponding author from NYCU. "Our research shows that the atomic interface between materials can be just as important. By engineering that boundary, we were able to reduce one of the fundamental trade-offs that has limited two-dimensional transistors for many years."
When the interface becomes problematic
Modern semiconductor technology relies on shrinking every component of the transistor. A key element is the gate dielectric, the insulating layer that separates the gate electrode from the transistor channel. In traditional silicon tech, years of engineering have led to dielectric materials capable of controlling smaller and smaller devices. However, atomically thin semiconductors pose a different challenge: their surfaces lack dangling bonds, making it hard for ultrathin dielectric films to grow evenly. Conventional deposition methods often result in incomplete coverage, interface defects, and electrical disorder, all of which reduce carrier mobility and degrade transistor performance. Researchers worldwide have proposed various solutions, from new dielectric materials and molecular seed layers to alternative oxide deposition techniques. Although many improvements have been made, achieving low equivalent oxide thickness, strong electrostatic control, and high carrier mobility simultaneously remains difficult, especially in wafer-scale CVD-grown monolayer MoS₂.
Engineering the atomic boundary
The NYCU team focused on engineering the interface itself instead of replacing the semiconductor or the gate dielectric. They began by depositing an ultrathin epitaxial aluminium layer directly on monolayer molybdenum disulfide (MoS₂), then carefully oxidized it to form about 0.42 nanometres of aluminium oxide before adding the high-κ hafnium oxide gate dielectric. Although only a fraction of a nanometre thick, this engineered interface plays two vital roles simultaneously. It first offers a smooth, continuous base for uniform hafnium oxide growth on the MoS₂ surface. Secondly, it acts as an atomic buffer, reducing electrical interference between the dielectric and the semiconductor, which helps maintain electron flow in the transistor channel. Rather than simply separating two materials, the interface actively enhances their combined function.
Balancing competing requirements
Using this interface-engineering approach, the researchers developed short-channel top-gate transistors made from CVD-grown monolayer MoS₂, with an equivalent oxide thickness near one nanometre. These devices showed low leakage current, minimal hysteresis, and a maximum transconductance of 0.45 mS μm⁻¹ in transistors with about 100 nanometre channels. Crucially, these results illustrate a rare combination of aggressive dielectric scaling, strong electrostatic control, and sustained carrier transport: three outcomes usually hard to achieve together in atomically thin transistors. Since the work used CVD-grown monolayer MoS₂ instead of mechanically exfoliated flakes, the researchers believe this method advances the technology closer to materials suitable for future wafer-scale manufacturing.
A broader shift in semiconductor design
Beyond just device performance, the researchers see this study as part of a larger shift in semiconductor engineering. For many years, progress in transistor technology focused on discovering new semiconductor materials or reducing device sizes. However, engineers now realize that the atomic-scale interfaces between these materials, regions only a few atoms thick, are crucial in determining how well the materials function together. This research contributes to the increasing evidence that understanding and controlling these atomic interfaces might become just as vital as creating new materials.
"When transistor components become only a few atomic layers thick, the interface is no longer simply the boundary between materials, it becomes an active part of the device," said Professor Tsung-En Lee, the study's corresponding author. "Learning to engineer these interfaces with atomic precision opens new opportunities for designing future semiconductor devices that would be difficult to achieve by changing individual materials alone."
Looking beyond silicon
As the semiconductor industry advances beyond traditional silicon scaling, atomically thin semiconductors are gaining more interest for future low-power logic and sophisticated electronic systems. Although further development is necessary to optimize fabrication for large-scale production, the researchers see their interface-engineering approach as a crucial step toward viable two-dimensional electronics. Overall, the study indicates that future breakthroughs in semiconductors will rely not just on finding new materials, but also on understanding and engineering the atomic interfaces that link them. As transistor dimensions approach the scale of individual atoms, the interface itself may become one of the most important components of the device.
Nature Electronics
Experimental study
High-transconductance molybdenum disulfide top-gate transistors using epitaxial interface engineering
31-Jul-2026
The authors declare no competing interests unless otherwise stated in the published article.