Researchers at Zhejiang University have developed a scalable 3.2 Tb/s O-band silicon photonic interconnect architecture designed to address the growing bandwidth demands of next-generation artificial intelligence (AI) computing systems. The work, published in PhotoniX Synergy , combines hybrid wavelength-port multiplexing, low-crosstalk optical multiplexing and demultiplexing, and adaptive wavelength stabilization to enable high-bandwidth and robust optical I/O, providing a scalable pathway toward terabit-scale optical interconnects for next-generation AI computing infrastructure.
As AI systems continue to scale, the growing movement of data between computing resources is placing increasing demands on conventional electrical interconnects. Silicon photonics offers a promising solution, but scaling wavelength-division-multiplexed (WDM) optical links to terabit-level capacities remains challenging due to channel density, crosstalk, and wavelength stability.
To address these challenges, the researchers developed a scalable O-band silicon photonic WDM I/O architecture with a heterogeneous multiplexer (MUX) and demultiplexer (De-MUX) design. By combining broadband lattice-filter-based MUXs at the transmitter with compact Vernier dual-microring De-MUXs at the receiver, the architecture balances bandwidth, footprint, insertion loss, and inter-channel crosstalk.
“Our goal was to make terabit-scale silicon photonic interconnects more scalable and robust,” said Jianyi Yang, corresponding author and professor at Zhejiang University. “By combining wavelength and port multiplexing with complementary multiplexer and demultiplexer designs, we can scale the aggregate bandwidth while maintaining manageable channel density and system complexity.”
To improve operational stability, the team implemented an FPGA-assisted adaptive wavelength-locking framework that uses closed-loop thermo-optic control to track and stabilize the resonant wavelengths of the devices.
“Wavelength stability is particularly important as resonator-based photonic systems become more highly integrated,” said Bin Zhang, a doctoral student at Zhejiang University and first author of the paper. “The FPGA-assisted adaptive wavelength-locking framework provides a flexible way to compensate for wavelength drift and helps improve the robustness of the optical interconnect.”
See the article:
A 3.2-Tbit/s PAM4 silicon photonic circuit with O-band scalable WDM I/O architecture for high-bandwidth optical interconnects
https://doi.org/10.1007/s44519-026-00011-9
Experimental study
Not applicable
15-Jul-2026
The author(s) declare that they have no conflict of interest.