Memory has played a pivotal role in modern semiconductor industry. However, achieving ultrafast operating speed in the nanosecond range and stable data retention capability simultaneously remains a dominant challenge.
To address these challenges, a team of Profs. Peng Zhou, Chunsen Liu and Yang Wang from Fudan University in Shanghai, China, reported an ultrafast non-volatile memory utilizing the floating gate configuration based on the 2D van der Waals heterostructure and metal-nanocrystal storage layer, where the MoS 2 , h-BN, and Pt nanocrystals are served as the channel, tunneling, and floating gate materials.
Compare to conventional continuous metal floating gate, discrete metal nanocrystals isolated by insulating dielectrics ensure charge retention stability. Single defect-induced leakage in the tunneling layer does not lead to complete charge loss, enabling superior data retention compared to existing technologies.
The research team leveraged hexagonal boron nitride (h-BN) as the tunneling layer, capitalizing on its ultralow defect density and atomically smooth surface free of dangling bonds. This material innovation effectively suppresses charge trapping defects, ensuring sharp interfaces between memory layers. Energy-dispersive spectroscopy (EDS) mapping image confirmed the flawless compositional integrity of the heterostructure, a key factor in achieving ultrafast operational speed of 20 ns and significant endurance up to 20000 cycles.
Experimental results demonstrate remarkable performance metrics: the memory exhibits a large memory window with distinguishable multilevel states controlled by pulse amplitude modulation. Remarkably, a retention time of about 10 years at room temperature is projected and programmed/erased states remained distinguishable for over 10 5 seconds after five months of storage. The results validate the device’s reliability and robustness under real-world conditions.
Beyond memory applications, inverters and NAND/NOR logic circuits based on the floating-gate memory are demonstrated, in which logic operations can be directly performed using the memory elements. The proposed circuits reduce transistor numbers and provide a solution to logic storage convergence, which opens a way to configure memory devices as key components of logic circuits.
Professor Zhou stated, “The findings provide a viable option for high-speed and robust memory applications and offer the ground for the next generation of high-performance non-volatile memory devices based on 2D materials” and added, “We are expecting it to lead to the development of in-memory computing systems in the future.”
This study was jointly conducted by State Key Laboratory of Integrated Chips and Systems, College of Integrated Circuits and Micro-Nano Electronics, Frontier Institute of Chip and System, Shaoxin Laboratory. This work was supported by the National Key Research and Development Program of China, the National Natural Science Foundation of China, the Shanghai Pilot Program for Basic Research-Fudan University 21TQ1400100, the New Cornerstone Science Foundation through the XPLORER PRIZE, the young scientist project of the MOE innovation platform, and the Shaoxing Municipal Science and Technology Program Projects.
National Science Open
Experimental study