Two-dimensional semiconductors are promising candidates for next-generation electronic devices because their atomically thin structures provide excellent electrostatic control and resistance to short-channel effects. However, their practical performance is frequently limited by the interface between the semiconductor channel and the metal electrodes.
A research team led by Xiaolong Xu and Yeliang Wang from Beijing Institute of Technology has developed a reactive phase-transformed contact strategy to address this challenge. The method protects fragile two-dimensional semiconductor surfaces during metal deposition and then converts the protective layer into a functional metallic electrode.
In conventional fabrication processes, high-work-function metals such as palladium are deposited directly onto two-dimensional semiconductors. During deposition, energetic metal atoms can damage the delicate crystal lattice, generating defects and gap states at the interface. These defects can strongly pin the Fermi level, making it difficult to control charge injection even when metals with suitable work functions are selected.
The new strategy separates interface protection from electrode formation. First, the researchers deposit a tellurium buffer layer through low-temperature thermal evaporation. Because the tellurium vapor has relatively low kinetic energy, the layer can cover the semiconductor surface without causing substantial structural damage. The tellurium layer then shields the underlying semiconductor during the subsequent deposition of palladium. After deposition, the researchers anneal the tellurium/palladium stack at 300 °C for 10 minutes. This mild thermal treatment triggers a solid-state reaction and transforms the stack into a conductive PdTe 2 electrode. Unlike a conventional sacrificial buffer layer, the tellurium layer does not need to be removed. Instead, it becomes part of the final electrical contact.
“Our strategy is designed to solve two problems at the same time: protecting the atomically thin semiconductor during metallization and forming a highly conductive contact after deposition,” said Xiaolong Xu, a corresponding author of the study. “The tellurium buffer layer acts as a soft landing surface for the contact metal and is then converted into a functional PdTe 2 electrode through a low-temperature reaction.”
The researchers applied the strategy to MoTe 2 field-effect transistors. Raman spectroscopy and spatially resolved Raman mapping confirmed the formation of PdTe 2 electrodes while showing that the underlying MoTe 2 channel retained its characteristic crystal structure. Cross-sectional scanning transmission electron microscopy further revealed an atomically sharp interface with a well-preserved van der Waals gap. Elemental mapping showed no obvious palladium diffusion into the MoTe 2 lattice. Electrical measurements demonstrated a substantial improvement in device performance. The contact resistance decreased from approximately 62.5 kΩ for directly deposited palladium contacts to approximately 10.5 kΩ for PdTe 2 contacts. The PdTe 2 -contacted MoTe 2 transistors displayed pronounced p-type transport, an on/off ratio exceeding 10 5 and nearly linear output characteristics, indicating a more transparent, Ohmic-like contact. Statistical measurements across 100 devices also demonstrated good process uniformity and reproducibility. To test the broader applicability of the method, the researchers extended the strategy to WSe 2 transistors. Devices with directly deposited palladium contacts exhibited predominantly n-type transport, consistent with strong Fermi-level pinning. In contrast, devices with PdTe 2 contacts displayed robust ambipolar behavior, with substantially enhanced hole injection while maintaining good electron transport.
“The polarity change observed in WSe 2 devices shows that the approach is not limited to a single semiconductor,” said Yeliang Wang, a corresponding author of the study. “By reducing deposition-induced interface damage, the contact electrode can more effectively regulate carrier injection and reveal the intrinsic transport properties of two-dimensional materials.” The low thermal budget and compatibility with scalable fabrication processes make this reactive phase-transformation strategy a promising route toward high-performance two-dimensional electronics. The researchers expect that the concept could support the development of complementary logic devices and future integrated circuits based on atomically thin semiconductors.
Other contributors include Mengting Huang, Shuangquan Qu, Yiming Ding, Binbin Zhang and Shibo Wang from the School of Integrated Circuits and Electronics, Beijing Institute of Technology, Beijing, China.
This work was supported by the National Natural Science Foundation of China, the National Key R&D Program of China, Young Elite Scientists Sponsorship Program by CAST, and the open research fund of Suzhou Laboratory.
DOI Link:
https://doi.org/10.26599/NR.2026.94908890
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Mitigating Fermi-Level Pinning in 2D transistors via reactive phase-transformed contacts
20-Aug-2026