The NanoSensor StageGate Accelerator will accelerate the development of innovative nanoscale-enabled products supporting the US Army's transition and applications in aerospace, energy, and transportation. Funding will enable commercialization opportunities and create high-tech jobs in New York State.
The US Senate has approved $1 million in funding for the New York Center for National Competitiveness in Nanoscale Characterization, a partnership between CNSE and NIST. The center aims to strengthen the US R&D-manufacturing-commercialization ecosystem in nanotechnology.
Columbia University is expanding its immersion lithography research program with $700,000 in funding from International SEMATECH North. The project aims to develop novel chemistries for double-exposure materials, a critical step towards advancing nanoelectronics manufacturing.
Veeco will receive funding to further develop its Ion Beam Deposition Tool, critical for EUV photomask production. This project is part of SEMATECH's $320M economic impact and 1,650 high-tech jobs generated in New York.
The College of Nanoscale Science and Engineering has successfully produced the world's first exposed images using the ASML EUV research and development tool. This achievement supports the R&D programs of the $600M International Venture for Nanolithography consortium, which includes global industry-university collaborations.
A team of researchers from CNSE and Einstein College of Medicine are developing a next-generation microchip to detect metastatic cells in tumors, enabling more aggressive cancer therapy. The device will be assembled from nanoscale components and implanted in human tumors to gather information on cancer cell behavior.
Researchers at UAlbany-CNSE have successfully created ferromagnetic silicon, which can maintain a permanent magnetic field above room temperature. This breakthrough has the potential to revolutionize spintronic devices, enabling faster and more efficient computing.
The collaboration aims to measure the performance of transistors with a target spatial resolution better than 10 nanometers, critical for controlling and improving semiconductor integrated circuits. The new technique will facilitate more accurate measurements, helping chip manufacturers reduce costs and time to market.