Prof. Seok Kim's team at Pohang University of Science and Technology (POSTECH) has developed a way to float ultra-thin silicon off its base, doubling computing density without shattering the chip.
For engineers building wearable devices, thinner silicon means more flexibility. But the link between extreme thinness and a chip's tendency to shatter during manufacturing has been a major roadblock.
Publishing in the International Journal of Extreme Manufacturing , Prof. Kim's team has bypassed this fragility by floating ultra-thin silicon in a liquid bath, allowing them to fabricate working transistors on both the front and back of the film.
The findings detail a 10-micrometer-thick silicon membrane - roughly as thin as a sheet of plastic wrap. By doubling the usable surface area, the design shows how physical processing can be adapted to pack more computing power into a smaller space without relying on harsh adhesives.
Flexible electronics are often carved out of thicker silicon blocks using chemical baths. This traditional method leaves a rough, uneven surface and creates sudden drop-offs in thickness between the working area and the rigid support frames. These physical weak points make the chips prone to cracking under stress and interfere with the precise fabrication of uniform electrical components.
To understand how to safely handle such thin material, Prof. Kim's team started with a specialized layered wafer and etched a precise grid of microscopic, 100-micrometer holes into the top silicon layer. These tiny pores allowed hydrofluoric acid to seep through and dissolve the underlying oxide layer holding the silicon in place.
Instead of pulling the delicate film off or using sticky tape, they submerged the wafer in acetone. The liquid naturally altered the adhesion energy, allowing the silicon membrane to simply float free through a process called self-delamination.
This free-floating silicon was tough enough to survive 35 separate manufacturing steps, including extreme heat, to build metal-oxide-semiconductor field-effect transistors (MOSFETs) on both sides.
When tested, the chips successfully switched electrical signals on both sides with high efficiency, maintaining an on/off current ratio of over 10,000. Even when wrapped around a curved surface with a 7.5-millimeter radius and bent 10,000 times, the transistors kept working.
Crucially, the two sides do not interfere with each other. Activating the back side of the chip with up to 6 volts caused a negligible change to the transfer characteristics on the front.
Prof. Kim's double-sided electronic design links liquid-based detachment to a viable structural workaround for a major manufacturing bottleneck in "stacked" three-dimensional microchips. "By proving that functional circuits can be reliably printed on both sides of a flexible membrane without relying on rigid supports or chemical adhesives, our technique effectively doubles the computing density of a given physical footprint, presenting a new option for semiconductor design," says Prof. Kim.
To push this method closer to commercial assembly lines, the research team will next focus on shrinking the transistor channel geometries and fine-tuning the silicon doping profiles.
If scaled successfully, this fluid-based manufacturing approach could supply the foundational hardware for next-generation foldable electronics, conformal medical sensors, and the dense vertical processing architectures required for artificial intelligence systems.
International Journal of Extreme Manufacturing (IJEM, IF: 21.3 ) is dedicated to publishing the best advanced manufacturing research with extreme dimensions to address both the fundamental scientific challenges and significant engineering needs.
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International Journal of Extreme Manufacturing
Self-delamination based double-sided MOSFET fabrication on single crystalline ultrathin silicon
10-Apr-2026